PyDEPP: Python Meets FPGA

Thu, 24 Apr 2025 09:16:09 +0000

I’ve released a new open-source project: PyDEPP – a Python library for communicating with Digilent FPGA boards via the DEPP protocol. The goal was to create a modern, object-oriented interface for accessing registers, data streams, and debugging functions, built directly on top of Digilent’s Adept SDK.

Why this project?

Digilent’s DEPP protocol is powerful, but its native interface is rather clunky. If you’ve ever worked with the C APIs, you know it could be more elegant. PyDEPP abstracts this complexity and brings register and stream access to Python-level simplicity – including context management via with, flexible timeout control, and debug dumps.

Highlights:

get_reg() / set_reg() – easy register access
put_stream() / get_stream() – efficient data transfer
Customizable timeouts
Context manager for clean resource handling
Register dumps for debugging

The library is fully open source and MIT licensed. If you’re into Python-based hardware communication, this is for you.

Tested with:

Digilent Nexys2 FPGA board
Python 3.11 on Debian
Shared libraries: libdmgr.so, libdepp.so from the Adept SDK

➡️ If you’re interested in embedded development with Python or want to make better use of the DEPP interface, you’re welcome to join in.

Digilent on 0xMax42 - Flatfile purist. Autodidact. Systems thinker.

PyDEPP: Python Meets FPGA